A common-emitter stage on a supply is biased at ( , Early voltage )

PHYSICS · Multi-part · Fermi University Physics · Electronics, Instrumentation & Communication · Semiconductor devices and analogue circuits · Semiconductor devices and analogue circuits

Electronics for Measurement, Ch Transistors: a current controlled by a third terminal

Problem

A common-emitter stage on a 9.0 V9.0\,\mathrm{V} supply is biased at IC=1.2 mAI_C = 1.2\,\mathrm{mA} (βF=120\beta_F = 120, Early voltage VA=70 VV_A = 70\,\mathrm{V}), with RC=3.3 kΩR_C = 3.3\,\mathrm{k}\Omega and an emitter resistor RE=1.0 kΩR_E = 1.0\,\mathrm{k}\Omega that is bypassed by a large capacitor. Take VT=25.7 mVV_T = 25.7\,\mathrm{mV}, base current negligible compared with the emitter current when finding the quiescent emitter voltage, and VCE(sat)=0.2 VV_{CE(\rm sat)} = 0.2\,\mathrm{V}. ((a)) Predict the mid-band small-signal voltage gain. ((b)) Predict the largest peak input amplitude that can be applied at the base before the output starts to clip, using the exponential law for the collector current and neglecting ror_o for this part. Both quantities can be checked on a bench: the gain from an oscilloscope trace of input and output, the clipping amplitude by raising the input sine amplitude until the top or bottom of the output trace flattens.

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