A register node in a CMOS circuit has a total load capacitance of and is charged and…

PHYSICS · Multi-part · Fermi University Physics · Electronics, Instrumentation & Communication · Digital electronics, embedded systems and data acquisition · Digital electronics, embedded systems and data acquisition

Electronics for Measurement, Ch Digital logic and its physical realisation

Problem

A register node in a CMOS circuit has a total load capacitance of 50 pF50\,\mathrm{pF} and is charged and discharged once every clock cycle (activity factor α=1\alpha = 1) at a clock frequency of 20 MHz20\,\mathrm{MHz}, from a 3.3 V3.3\,\mathrm{V} supply. ((a)) Compute the average supply current drawn by this node. ((b)) Compute the power it dissipates. ((c)) State in words where this energy goes.

Browse the problem library