A linear regulator's error-amplifier loop has DC gain and a single dominant pole at
PHYSICS · Subjective · Fermi University Physics · Electronics, Instrumentation & Communication · Semiconductor devices and analogue circuits · Semiconductor devices and analogue circuits
Inside the Instrument, Ch References, regulators and switching converters
Problem
A linear regulator's error-amplifier loop has DC gain T0=2000 and a single dominant pole at fp=20Hz, so T(jω)=T0/(1+jf/fp). With the loop opened, a change in input voltage is passed to the output with a feedthrough gain of unity (0 dB), so the power-supply rejection ratio is PSRR(f)=20log10∣1+T(jf)∣dB. The rectified mains ripple in this rig appears at 100Hz (twice the 50Hz mains frequency, full-wave rectified). Find the regulator's PSRR at 100Hz.