An engineer commissioning an LDO test board argues as follows: "The output pole from…
PHYSICS · Multi-part · Fermi University Physics · Electronics, Instrumentation & Communication · Semiconductor devices and analogue circuits · Semiconductor devices and analogue circuits
Inside the Instrument, Ch References, regulators and switching converters
Problem
An engineer commissioning an LDO test board argues as follows: "The output pole from RL∥ro=20Ω and Cout=22μF sits at only a few hundred hertz, far below my crossover of tens of kilohertz, so the capacitor's ESR is a parasitic loss that cannot matter". On this basis they choose a 22μF ceramic capacitor with RESR=3mΩ in place of the specified 22μF tantalum part with RESR=0.3Ω, and reports the board oscillating. The loop has DC gain T0=2000, an error-amplifier pole at 500Hz, a pass-device pole at 500kHz, and the output pole and ESR zero set by RL∥ro=20Ω and Cout=22μF as stated. All poles and the zero may be treated as simple first-order terms.
((a)) Find the output pole frequency and, treating the loop as dominated by the error-amplifier pole and the output pole below crossover, estimate the crossover frequency.
((b)) Find the phase margin with the tantalum capacitor and with the ceramic capacitor.
((c)) State precisely where the engineer's reasoning fails.