A project report for a data-logging instrument contains three claims
PHYSICS · Multi-part · Fermi University Physics · Electronics, Instrumentation & Communication · Digital electronics, embedded systems and data acquisition · Digital electronics, embedded systems and data acquisition
Inside the Instrument, Ch Microcontrollers and programmable logic for measurement
Problem
A project report for a data-logging instrument contains three claims. Find the error in each.
((a)) "Our sampling handler produces 400Ss−1 of two-byte samples, 800Bs−1, but the serial link only runs at 4800 baud with ten bits per frame, 480Bs−1. Samples were being lost, so we enlarged the transmit buffer to 1024bytes; this has permanently fixed the problem."
((b)) The counter's register-transfer description reads: process(clk) begin if rising_edge(clk) then q <= a; q <= b; end if; end process; (In a clocked process, when one signal is assigned twice, the later assignment overrides the earlier one.) The report states: "the first line sets q to a, and one clock period later the second line takes effect and sets q to b, so it takes two clock cycles for q to reach b."
((c)) "We do not time-stamp samples or check the buffer-fill inequality at run time, and we did not add a watchdog timer, because the instrument passed every timing test on the bench; this proves the firmware always meets its timing."