Physical Qubit Implementations

Every quantum algorithm eventually meets a piece of metal, glass, or vacuum chamber. The abstract qubit of Quantum Circuit Model is a clean two-level system evolving under unitary gates. It has to be realized in some physical medium. That medium fights back with noise, cross-talk, and finite lifetimes. Building a fault-tolerant computer with the surface code requires physical error rates below roughly 10−210^{-2} to 10−310^{-3} per gate. It also requires thousands of well-connected qubits, and fast, high-fidelity measurement. No single platform yet satisfies all of these simultaneously. That is why hardware choice is one of the most consequential engineering decisions in quantum computing. This article compares the three leading physical platforms — superconducting circuits, trapped ions, and photonics. It compares them along four axes that determine whether a real device can run useful algorithms: coherence time, qubit connectivity, gate speed, and scalability. These axes are in tension. Superconducting qubits are fast but short-lived and only locally connected. Trapped ions are slow but nearly perfectly connected and extremely long-lived. Photons barely decohere at all but are hard to make interact. That interaction is exactly what two-qubit gates require. Understanding these trade-offs is essential context for Decoherence and Quantum Noise translated into engineering reality. The big picture is that physical qubits are never abstract two-level systems in isolation. They are embedded in control electronics, cryostats, laser systems, or optical networks. These systems impose their own limits. A superconducting transmon is a qubit and a microwave resonator and a Josephson junction and a piece of a dilution refrigerator. A trapped ion is a qubit and a mechanical oscillator and a laser-addressable atom. These physical facts are not incidental. They are the reason error rates, gate times, and connectivity graphs look the way they do. They also directly determine which quantum error-correcting codes are practical. This article delivers a systematic comparison. It covers how each platform stores and manipulates quantum information, and the physics governing its coherence and gate fidelity. It includes a worked numerical comparison of overheads for a fixed logical error target. It also covers the engineering pitfalls that trip up newcomers to hardware-aware algorithm design. It sets up The NISQ Era, where these imperfect devices are used directly, without full error correction.

Key takeaways
  • Superconducting qubits (transmons) use nonlinear LC circuits on a chip; fast (10–50 ns gates) but short-lived (50–300 μs) with local, planar connectivity.
  • Trapped ions store qubits in atomic energy levels; extremely long coherence (seconds to minutes) and all-to-all connectivity within a chain, but slow gates (1–100 μs) via lasers.
  • Photonic qubits encode information in light; near-zero decoherence in transit but two-photon gates are inherently probabilistic and hard to make deterministic.
  • Connectivity topology (2D grid vs. all-to-all vs. reconfigurable) directly shapes which error-correcting codes and compiler routing strategies are efficient.
  • The relevant single number for comparing platforms is the ratio of coherence time to gate time — the number of gates you can do before decoherence wins.
  • No platform dominates on all four axes; system design is a Pareto trade-off between speed, lifetime, connectivity, and manufacturability.
The core insight

Physical qubit platforms trade coherence, connectivity, and gate speed against each other, and no current technology wins on all three — so hardware choice is a first-class algorithmic constraint, not an implementation detail.

The idea

A physical qubit is any two-level (or effectively two-level) quantum system that can be initialized, coherently manipulated, coupled to at least one neighbor, and measured with tolerable error. The three dominant platforms differ in what the two levels are and how they are controlled. In superconducting circuits, the qubit is the two lowest energy levels of a nonlinear LC oscillator called a transmon, built from a capacitor shunting a Josephson junction; control is via microwave pulses routed on-chip. In trapped-ion systems, the qubit is a pair of long-lived internal states of an ion (a hyperfine or optical transition) held in a vacuum by electromagnetic fields; control is via laser pulses. In photonic systems, the qubit is typically encoded in a photon's polarization, path, or time-bin degree of freedom; control is via linear optics (beamsplitters, phase shifters) plus measurement-induced nonlinearity. Four metrics let us compare platforms on equal footing. Coherence time (T1T_1 for energy relaxation, T2T_2 for dephasing) measures how long quantum information survives before environmental noise randomizes it — the subject of Decoherence and Quantum Noise. Connectivity describes which pairs of qubits can be entangled directly with a native two-qubit gate; a 2D nearest-neighbor grid (superconducting) is very different from all-to-all coupling (trapped ions in a shared trap). Gate speed is the duration of a single- or two-qubit operation; faster gates mean more operations fit inside a fixed coherence window. Scalability captures how the engineering difficulty (wiring, control lines, calibration, cross-talk) grows as qubit count increases — often the true bottleneck, distinct from any single qubit's intrinsic quality. The single most useful composite quantity is the coherence-to-gate-time ratio, sometimes reported as the number of gate operations achievable within T2T_2. This ratio, not T2T_2 alone, predicts how many logical operations a device can support before noise accumulates past the error-correction threshold used in the surface code. A platform with long coherence but very slow gates can have a worse effective budget than a platform with short coherence but very fast gates.

How it works

Superconducting qubits (transmons)

A transmon is a small superconducting island connected to ground through a Josephson junction (a thin insulating barrier between two superconductors) and shunted by a large capacitor. The junction provides nonlinear inductance, which makes the energy levels of the resulting oscillator unevenly spaced — this anharmonicity is what lets microwave pulses address only the lowest two levels ∣0⟩,∣1⟩|0\rangle, |1\rangle without leaking into ∣2⟩|2\rangle. Single-qubit gates are implemented by applying resonant microwave pulses through capacitively coupled control lines; a pulse of the right amplitude, phase, and duration rotates the qubit state on the Bloch sphere. Two-qubit gates (e.g., the cross-resonance gate or tunable coupler schemes) entangle physically adjacent qubits by briefly bringing their transition frequencies into resonance or driving one qubit at the frequency of its neighbor. Readout uses a dispersively coupled resonator: the qubit's state shifts the resonator's frequency, and a probe microwave tone reflects with a state-dependent phase. Qubits are fabricated lithographically on a chip and cooled to about 10–20 millikelvin in a dilution refrigerator to suppress thermal excitation and to keep the superconductor superconducting. Because control wiring is physical (coaxial lines into the fridge), connectivity is limited to a planar, typically nearest-neighbor grid — matching well to the 2D layout the surface code assumes.

Trapped ions

An ion (commonly Yb⁺, Ca⁺, Ba⁺) is confined by a combination of static and oscillating electric fields in a linear Paul trap, forming a chain of ions that mutually repel via Coulomb interaction and share collective vibrational (phonon) modes. The qubit is encoded in two internal electronic states, chosen either as hyperfine ground-state sublevels (long-lived, insensitive to magnetic field with the right choice) or as a ground and metastable excited state. Single-qubit gates are driven by laser pulses (or microwaves, for hyperfine qubits) tuned to the qubit transition, rotating the Bloch vector via stimulated Raman transitions. Two-qubit gates exploit the shared phonon modes: a laser pulse conditionally displaces the ions' collective motion in a way that imparts a state-dependent phase, disentangling the motion at the end (the Mølmer–Sørensen gate is the standard scheme). Because every ion in the chain shares the same motional modes, any pair of ions can in principle be entangled directly — giving all-to-all connectivity within a trap, a qualitatively different topology from superconducting grids. Readout uses state-dependent fluorescence: shining a laser resonant with a cycling transition causes ions in one state to scatter many photons (detected on a camera or photomultiplier) while the other state stays dark.

Photonic qubits

A photonic qubit encodes a bit in a photon's polarization (∣H⟩,∣V⟩|H\rangle, |V\rangle), spatial path, or arrival time-bin. Single-qubit gates are trivial and essentially lossless: waveplates or integrated phase shifters and beamsplitters implement arbitrary single-qubit rotations with very high fidelity, because linear optical elements do not directly decohere the encoded state. The hard part is two-qubit gates. Photons do not naturally interact with each other, so entangling operations must be engineered either through measurement-induced nonlinearity (the Knill–Laflamme–Milburn scheme routes two photons through beamsplitters and post-selects on detector outcomes, succeeding only probabilistically) or through a matter-mediated interaction (coupling photons to a physical qubit such as an atom or a superconducting cavity, e.g., in cluster-state or measurement-based schemes). This intrinsic probabilism is the platform's defining structural feature and drives its entire architecture toward measurement-based computation with heavy multiplexing and error-corrected fusion of small entangled resource states. Because photons travel at the speed of light and barely interact with their environment, coherence loss is not the dominant error source; instead, photon loss (absorption, scattering, coupling inefficiency) is the primary enemy, and it grows with circuit depth and distance traveled.

Comparative pseudocode: a single logical operation across platforms

The following pseudocode captures the common abstraction — apply a native two-qubit entangling gate — while making explicit where each platform's physics enters. ``` function ENTANGLE(platform, qubit_i, qubit_j): if platform == SUPERCONDUCTING: require ADJACENT(qubit_i, qubit_j) # planar connectivity constraint tune_frequency(qubit_i, target = qubit_j.frequency) apply_microwave_pulse(duration ≈ 20-40 ns) return CZ_or_CNOT gate, fidelity ≈ 0.995-0.999 if platform == TRAPPED_ION:

# no adjacency requirement: shared phonon bus select_motional_mode(chain) apply_bichromatic_laser_pulse(qubit_i, qubit_j, duration ≈ 1-100 μs) return Mølmer-Sørensen gate, fidelity ≈ 0.99-0.999 if platform == PHOTONIC: route_photons_through_linear_optics(qubit_i, qubit_j) measure_ancilla_photons() if measurement_outcome == SUCCESS: # probabilistic! return fused entangled pair, fidelity ≈ 0.97-0.99 else: return FAILURE # must retry or use fresh resource state ``` The `if measurement_outcome == FAILURE` branch is not a corner case for photonics — it is the normal operating regime, and real photonic architectures are built around amortizing this failure probability across many parallel attempts (multiplexing) rather than eliminating it.

Figure
Three platforms: qubit substrate, control, and connectivity graph
Superconducting (chip) connectivity: 2D grid, nearest-neighbor gate: microwave pulse, ~20-40 ns T2 ~ 50-300 μs; cryostat ~15 mK Trapped ion (linear chain) shared phonon bus connectivity: all-to-all within chain gate: laser pulse, ~1-100 μs T2 ~ seconds-minutes; UHV chamber Photonic (linear optics) ↦ photon connectivity: reconfigurable optical network gate: probabilistic fusion, post-selected loss-limited, not decoherence-limited Circles/box = qubit substrate. Dashed/diagonal = coupling mechanism. Bottom text = dominant constraint.

Complexity & correctness

There is no single "complexity" for a physical platform the way there is for an algorithm, but the relevant analog is the resource overhead required to reach a target logical error rate, and this is where platform physics becomes a quantitative, derivable quantity.

Gate count budget. If a qubit has dephasing time T2T_2 and a two-qubit gate takes time τ2q\tau_{2q}, the number of two-qubit gates executable before decoherence dominates scales as

Ngates∼T2τ2q.N_{\text{gates}} \sim \frac{T_2}{\tau_{2q}}.

Superconducting: T2≈100 μsT_2 \approx 100\,\mu s, τ2q≈30 ns⇒Ngates∼3000\tau_{2q} \approx 30\,ns \Rightarrow N_{\text{gates}} \sim 3000. Trapped ion: T2≈1 sT_2 \approx 1\,s, τ2q≈50 μs⇒Ngates∼20,000\tau_{2q} \approx 50\,\mu s \Rightarrow N_{\text{gates}} \sim 20{,}000. Photonic: coherence is not the limiting quantity; loss probability per component plays the analogous role, so the relevant ratio is total transmittance across the circuit depth, ηd\eta^{d} for per-component transmittance η\eta and depth dd. This ratio is the correct comparison metric — not T2T_2 alone — because it already accounts for the fact that a slower platform "wastes" more of its coherence budget per operation.

Threshold theorem connection. The surface code's threshold theorem states that if the physical two-qubit gate error rate pp is below a threshold pth≈10−2p_{th} \approx 10^{-2} (numerically), then increasing code distance dd suppresses the logical error rate roughly as

pL∼A(ppth)(d+1)/2p_L \sim A \left(\frac{p}{p_{th}}\right)^{(d+1)/2}

for constant AA. Correctness of this comparison hinges on the fact that gate error rate pp, not gate speed or coherence time individually, is the fundamental quantity entering the threshold theorem. A platform can have short coherence and still be viable if gates are fast and clean enough that pp stays under threshold — which is precisely the superconducting bet. A platform can have gates well above threshold error even with long coherence, if crosstalk or control-line imperfections dominate — a real risk for large trapped-ion chains.

Connectivity and code overhead. The surface code is defined on a 2D nearest-neighbor lattice, matching superconducting connectivity almost natively — an architectural correctness argument: physical layout and code layout coincide, so no extra "routing" gates (SWAPs) are needed to bring distant qubits together for stabilizer measurements. Trapped ions have better raw connectivity (all-to-all) but this is a double-edged sword: sufficiently large ion chains suffer from crosstalk and slower gates as chain length grows (motional mode density increases), which is why large trapped-ion systems increasingly use modular architectures — small chains linked by photonic interconnects — rather than one giant chain. Photonic systems have essentially reconfigurable connectivity determined by the optical network, but the probabilistic nature of entangling gates means the effective connectivity depends on a success probability that must be multiplied into all resource estimates.

Honesty about trade-offs. No platform is dominant:

  • Superconducting wins on gate speed and code-matching connectivity, loses on coherence and fabrication-variability-driven calibration overhead.
  • Trapped ions win on coherence and connectivity, lose on gate speed and chain-scaling engineering (laser addressing precision, vacuum system complexity).
  • Photonics wins on decoherence immunity and room-temperature operation, loses on deterministic two-qubit gates, forcing large redundancy (many attempts, many ancilla photons) to succeed with high probability.

Worked example

Consider designing a device meant to sustain a single surface-code logical qubit at distance d=15d = 15 — a middling but realistic target — for long enough to run 10610^6 physical gate cycles (a modest sequence for a small algorithm run). We compare superconducting and trapped-ion platforms on whether their coherence-to-gate ratio comfortably exceeds the code cycle count, and check the physical two-qubit gate error against the surface code threshold.

Step 1 — surface code cycle count. Distance d=15d=15 requires physical error rate roughly a factor of 1010 below threshold to reach useful logical error suppression over many cycles (a standard rule of thumb, not a universal law). With pth≈1%p_{th} \approx 1\%, we need p≲0.1%p \lesssim 0.1\% per physical two-qubit gate.

Step 2 — check reported gate fidelities.

PlatformReported 2Q gate error (typical, mid-2020s hardware)Below 0.1% target?
Superconducting (tunable coupler)~0.3%–0.5%Close, often borderline
Trapped ion (Mølmer–Sørensen)~0.1%–0.3%Meets or borderline
Photonic (fusion gate, post-selected)effective loss-adjusted error ~1%–3%Not yet, loss-dominated

Step 3 — compute available gate budget from coherence. For superconducting, T2≈100 μsT_2 \approx 100\,\mu s, gate time 30 ns30\,ns:

Ngates∼100,000/30≈3300.N_{\text{gates}} \sim 100{,}000 / 30 \approx 3300.

A single surface-code syndrome-extraction cycle uses roughly O(d2)O(d^2) physical two-qubit gates (each of the d2d^2 data qubits participates in a constant number of stabilizer checks per round), so for d=15d = 15, one round costs on the order of a few hundred two-qubit gates. Sustaining 10610^6 rounds is therefore not limited by single-shot coherence — coherence is refreshed every round via active error correction — but by whether the per-gate error rate stays under threshold across all 106×O(d2)10^6 \times O(d^2) gates, which is a fidelity question, not a raw coherence-time question.

Step 4 — the real bottleneck. This is the crucial correctness point: error correction is designed precisely so that coherence time does not need to exceed algorithm runtime — decoherence is corrected round by round, provided the per-gate error rate is under threshold. So the deciding factor is column 2 of the table above (gate fidelity), not T2T_2 directly. Superconducting devices, despite their short T2T_2, remain viable candidates for the surface code specifically because their gates are fast enough that many error-correction rounds fit inside T2T_2, keeping the effective per-round error controlled. Photonic architectures instead pursue a structurally different code (e.g., fusion-based or bosonic codes) precisely because the two-qubit gate error is currently too high for the standard surface-code threshold with realistic loss rates.

Step 5 — connectivity check. At d=15d=15, the surface code needs a 15×1515\times15 (or similar) grid of data and ancilla qubits with only nearest-neighbor two-qubit gates — around 2×152≈4502\times15^2 \approx 450 physical qubits. Superconducting chips map this directly onto silicon layout. A trapped-ion implementation of the same code would either need a single chain of 450450 ions (currently far beyond demonstrated chain lengths with acceptable gate fidelity) or a modular network of smaller chains connected by photonic links, introducing additional loss and latency at every module boundary — illustrating that all-to-all connectivity within a module does not eliminate the scaling problem, it relocates it to the interconnect.

Common pitfalls & traps

PitfallWhy it's wrongFix
Comparing platforms using T2T_2 aloneIgnores gate speed; a short-T2T_2/fast-gate platform can outperform a long-T2T_2/slow-gate oneAlways compute T2/τgateT_2/\tau_{gate}, the effective gate budget
Assuming trapped-ion all-to-all connectivity scales for freeChain length increases motional mode density, hurting gate fidelity and speedModel connectivity overhead as a function of chain size, not a constant
Treating photonic gate failure as an error to "reduce"It is a structural feature (measurement-induced nonlinearity), not a defect to fix awayDesign architectures around multiplexed retries, not around eliminating probabilism
Ignoring cross-talk when counting qubit count as the scalability metricMore qubits often means more calibration and control-line coupling, not linear-cost scalingReport per-qubit control overhead and calibration time alongside qubit count
Assuming higher connectivity always reduces code overheadSurface code is designed for 2D nearest-neighbor; excess connectivity doesn't help that specific codeMatch code choice to platform topology, or account for routing costs explicitly
Comparing raw coherence times across platforms without stating T1T_1 vs T2T_2T1T_1 (relaxation) and T2T_2 (dephasing) can differ by orders of magnitude and affect different error channelsAlways specify which coherence time and which noise channel it bounds

Pioneers & history

The physical qubit landscape emerged from decades of separate advances in atomic physics, superconducting electronics, and quantum optics, later unified by the shared goal of scalable quantum computation.

Origins · 1 minDavid J. Wineland and how this was discovered
DJ
David J. Wineland
1944– · American physicist, NIST; pioneered laser cooling and trapping of ions for precision measurement and quantum information, sharing the 2012 Nobel Prize in Physics

SH
Serge Haroche
1944– · French physicist, Collège de France; developed cavity quantum electrodynamics techniques for measuring and manipulating individual photons, co-recipient of the 2012 Nobel Prize in Physics

MD
Michel Devoret
1953– · French-American physicist, Yale University; a founding figure in circuit quantum electrodynamics and superconducting qubit design, developing the transmon lineage of devices

JO
Jeremy O'Brien
1974– · British physicist; a leading developer of integrated silicon photonic quantum circuits and linear-optical quantum computing architectures

History
1995
— Cirac and Zoller propose a concrete scheme for a trapped-ion quantum computer using a shared vibrational mode as the entangling bus.
1999
— Nakamura, Pashkin, and Tsai demonstrate coherent control of a superconducting charge qubit, launching the superconducting-qubit era.
2001
— Knill, Laflamme, and Milburn show that linear optics plus measurement (no direct photon-photon interaction) suffices for universal photonic quantum computation.
2007
— The transmon qubit design (Koch, Devoret, and collaborators) dramatically improves coherence over earlier charge qubits by reducing sensitivity to charge noise.
2019
— Google's Sycamore superconducting processor and continued trapped-ion demonstrations (IonQ, Honeywell/Quantinuum) mark the transition into the The NISQ Era of noisy, intermediate-scale devices.

Where this matters

Superconducting platforms underlie the processors built by Google, IBM, and Rigetti, and are the leading candidates for near-term surface-code demonstrations precisely because their planar layout matches the code's native geometry. Trapped-ion systems, commercialized by IonQ and Quantinuum, are used where high gate fidelity and flexible connectivity matter more than raw qubit count — useful for algorithms requiring dense, long-range entanglement without deep routing overhead. Photonic platforms, pursued by PsiQuantum and Xanadu, target architectures built around fault-tolerant measurement-based computation and offer a path to room-temperature, fiber-networked quantum computers, leveraging the same optical infrastructure used in classical telecommunications. Beyond these three, neutral-atom arrays (assembled with optical tweezers) and topological qubit proposals borrow ideas from all three paradigms, and hybrid systems increasingly couple superconducting circuits to photonic links for long-distance entanglement distribution. Every one of these engineering choices feeds directly into compiler design: gate scheduling, qubit routing, and error-correction code selection are all downstream of the physical connectivity graph and native gate set discussed here — the concrete hardware backdrop against which The NISQ Era algorithms and near-term error mitigation strategies are designed.

Ask the tutor: How would the resource estimate change if we targeted a fusion-based photonic code instead of the standard surface code?

Why can't we just pick the platform with the longest coherence time and ignore the rest?

Coherence time alone doesn't determine how many operations you can perform, because gate speed sets how much of that coherence window each operation consumes. A platform with T2=1T_2 = 1 second but 100 μs100\,\mu s gates gives roughly 10,00010{,}000 operations before decoherence risk grows large, while a platform with T2=100 μsT_2 = 100\,\mu s but 30 ns30\,ns gates gives roughly 33003300 — a much closer number than the raw coherence times suggest. Moreover, in a fault-tolerant regime, active error correction refreshes information every code cycle, so the deciding quantity becomes the per-gate error rate relative to the code's threshold, not raw coherence duration. Coherence time is one input to that error rate, but connectivity, control-line crosstalk, and calibration precision matter just as much.

Why is photonic two-qubit gate probabilism considered a structural feature rather than a bug?

Photons don't interact with each other in vacuum or ordinary media, so any entangling operation must be mediated indirectly — usually through interference at a beamsplitter followed by a measurement whose outcome only sometimes corresponds to the desired entangled state. This is a consequence of linear optics being the natural, low-loss toolkit available for photons; adding strong photon-photon interactions typically requires exotic nonlinear media with their own losses. Rather than fighting this fact, photonic architectures (like fusion-based quantum computing) are designed around it: many small entangled resource states are generated in parallel, and successful fusion attempts are stitched together into a larger computation, with failed attempts simply discarded and retried.

How does connectivity affect compiler overhead, concretely?

If a two-qubit gate is required between qubits that are not physically adjacent, the compiler must insert SWAP gates to bring them together, and each SWAP typically costs about three two-qubit gates' worth of error. On a superconducting 2D grid, algorithms with long-range entanglement requirements can incur significant SWAP overhead, sometimes doubling or tripling the effective circuit depth. On an all-to-all trapped-ion chain, no such SWAP routing is needed for a single module, which is a major practical advantage for circuits with irregular entanglement patterns, even though the underlying gates are slower per operation.

Are neutral-atom arrays a fourth major platform, and how do they compare?

Neutral-atom arrays trap individual atoms in optical tweezers arranged in reconfigurable 2D or 3D patterns, with qubits encoded in atomic ground and Rydberg (highly excited) states. They combine some strengths of both leading platforms: connectivity can be made flexible by physically moving atoms between tweezer positions, and coherence times are long since atoms are well isolated in vacuum. Gate speeds via Rydberg interactions are intermediate between superconducting and ion-based platforms. They are increasingly discussed alongside the three platforms covered here, though as of the current generation of hardware their two-qubit gate fidelities and scalable control remain active engineering challenges.

Why do trapped-ion systems increasingly use modular, networked architectures instead of one large chain?

As an ion chain grows, the density of shared vibrational (phonon) modes increases, making it harder to selectively address a specific mode without exciting others, which degrades two-qubit gate fidelity and slows gate execution. Rather than pushing single chains indefinitely, many trapped-ion efforts now link smaller, high-fidelity chains ("modules") using photonic interconnects that generate remote entanglement between ions in different traps. This trades some entanglement generation speed and adds photon-loss-related error at the interconnect, but avoids the fidelity degradation that comes from scaling a single chain too large — a direct analog to the interconnect challenges seen in classical distributed computing.

How does this article's comparison connect to the surface code specifically?

The surface code assumes a 2D lattice of physical qubits with only nearest-neighbor stabilizer measurements, and its threshold theorem is stated in terms of a physical gate error rate pp relative to a threshold pthp_{th}. Superconducting hardware's native grid layout minimizes the routing overhead needed to implement this lattice, which is why most near-term surface-code demonstrations use superconducting qubits. Trapped-ion and photonic platforms are exploring alternative codes (e.g., codes suited to all-to-all connectivity, or fusion-based codes suited to probabilistic photonic gates) precisely because forcing a mismatched platform onto the surface code's specific geometry can introduce unnecessary overhead.

What foreshadows the transition to the NISQ era from this hardware comparison?

None of the three platforms currently combines low enough gate error, high enough qubit count, and sufficient connectivity to run full fault-tolerant error correction at a useful scale. This gap between what error correction requires and what hardware currently delivers defines the noisy intermediate-scale quantum (NISQ) regime, where algorithms are run directly on noisy physical qubits without full logical encoding, using techniques like error mitigation instead of error correction. The platform trade-offs described here — coherence, connectivity, gate speed — become the direct constraints that NISQ algorithm designers must work within rather than abstract away.

Before this