The p–n Junction

The p–n junction is the atom of modern electronics: nothing in a chip works without it. Every rectifier diode in a phone charger, every LED in a screen, every photodiode in a camera sensor, and every one of the tens of billions of transistors in a processor is built from junctions like Ohl's — usually many per device. The same barrier that blocks current in the dark is what makes a solar cell work: sunlight absorbed in the depletion region creates electron–hole pairs, the built-in field sweeps them apart (electrons to the n-side, holes to the p-side), and that separated charge drives a current through an external circuit. Ohl's illuminated crack was the first glimpse of this, and today more than a terawatt of installed photovoltaics runs on exactly that physics. The next article takes this equilibrium junction, connects a battery, and watches the barrier bend: the diode.

Start with the two crystals from the previous article, held apart for a moment before we join them. The n-type silicon is peppered with pentavalent donor atoms; each has given up one electron to roam freely, so the n-side is crowded with mobile electrons (majority carriers) and has only a scattering of holes (minority carriers). Every donor that gave up its electron is now a fixed positive ion, locked into the crystal lattice — but the piece as a whole is electrically neutral, because those positive ions are exactly matched by the free electrons wandering among them. The p-type silicon is the mirror image: trivalent acceptor atoms have each captured an electron, creating a mobile hole and leaving behind a fixed negative ion, so the p-side is crowded with holes and, again, is neutral overall. Now fuse them into one continuous crystal. At the boundary the n-side has perhaps a hundred million times more electrons than the p-side, and the p-side just as lopsided an excess of holes. Nature abhors such a gradient. Electrons stampede from the electron-rich n-side into the electron-poor p-side, and holes stampede the opposite way — not because anything pushes them, but by sheer statistical diffusion, the same reason a drop of ink spreads through still water. As an electron crosses into the p-side it meets a sea of holes and quickly recombines with one, both vanishing as free carriers.

Every crossing carrier strips one more mobile charge from the boundary and empties out a sliver of crystal. On the n-side, each electron that leaves uncovers the fixed positive donor ion it used to neutralise; on the p-side, each hole that leaves (or each arriving electron that fills it) uncovers a fixed negative acceptor ion. Very quickly a thin zone straddling the junction is swept almost completely clear of mobile carriers, leaving only these locked-in charged ions: positive on the n-side, negative on the p-side. This carrier-free sleeve of exposed ionic charge is the depletion region — also called the space-charge region — and it is where all the action of a junction happens. It is typically astonishingly thin, of order half a micrometre to a micrometre, thinner than a wavelength of visible light.

The depletion region is not neutral. It is a slab of frozen charge — negative acceptor ions on the p-side, positive donor ions on the n-side — and any separated charge sets up an electric field. That field points from the positive donor ions on the n-side toward the negative acceptor ions on the p-side: in short, from the n-side to the p-side, across the junction. This is the crucial self-built field. Notice its direction is exactly wrong for the diffusing carriers: it pushes electrons back toward the n-side and holes back toward the p-side, opposing the very diffusion that created it. So the junction throttles itself. The first electrons cross easily, but each adds to the exposed ionic charge, strengthens the retarding field, and makes it harder for the next to follow. Diffusion does not stop instantly — it slows, chokes, and finally halts when the field turns back exactly as many carriers as diffusion sends forward. The depletion region stops growing and the junction sits in equilibrium. One clean statement governs the geometry, and it needs only the conservation of charge. The crystal was neutral before we joined it and neutral after, so the depletion region as a whole carries zero net charge: the total negative acceptor charge exposed on the p-side must equal the total positive donor charge on the n-side. If the depletion layer reaches $x_p$ into the p-side (doped $N_A$ acceptors per cubic metre) and $x_n$ into the n-side (doped $N_D$ donors per cubic metre), then across the same junction area those charges balance:

where: $N_A$ and $N_D$ are the acceptor and donor concentrations (per cubic metre), and $x_p$, $x_n$ are how far the depletion region penetrates each side. The physical reading is immediate and often tested: the depletion region eats further into the lightly-doped side. If one side is doped ten times more heavily, it needs to expose ten times fewer ions over the same width, so the depletion layer barely dents it and reaches ten times deeper into the lightly-doped partner. A heavily-doped p⁺ region joined to a lightly-doped n region has almost all of its depletion width sitting on the n-side.

An electric field across a gap means a potential difference across that gap — just as the field between the plates of a capacitor implies a voltage between them. Because the field points from n to p, the n-side sits at a higher potential than the p-side. This built-in voltage step is the barrier potential (or built-in potential) $V_0$. An electron trying to diffuse from the n-side to the p-side must climb this hill; a hole trying to go the other way faces the same barrier. It is called a barrier precisely because it is the energy price a majority carrier must pay to cross, and only the fastest, most energetic carriers in the thermal spread can pay it. How big is $V_0$? It is fixed by the doping and by the intrinsic carrier density $n_i$, through a result of equilibrium statistics:

where: $kT/q$ is the thermal voltage, about $0.026\ \text{V}$ at room temperature ($300\ \text{K}$), $N_A N_D$ is the product of the two doping levels, and $n_i$ is the intrinsic carrier concentration from the intrinsic-semiconductor article ($1.5\times10^{16}\ \text{m}^{-3}$ for silicon, $2.4\times10^{19}\ \text{m}^{-3}$ for germanium). This formula is quoted, not derived here: obtaining it requires balancing the drift and diffusion currents with Boltzmann statistics, which uses calculus and lies beyond this article — we simply state the standard result and read it. The physical reading is what matters for exams. First, the barrier grows with doping (more ions, bigger field) but only logarithmically, so it is remarkably insensitive — doping ten times harder adds only a few tens of millivolts. Second, and this is the punchline, the barrier is larger when $n_i$ is smaller. Silicon's tiny $n_i$ gives it a bigger barrier ($\sim\!0.7\ \text{V}$) than germanium's much larger $n_i$ ($\sim\!0.3\ \text{V}$) — and $n_i$ is small precisely because silicon's band gap is wider. So the two anchor numbers you must remember, $0.7\ \text{V}$ for silicon and $0.3\ \text{V}$ for germanium, trace all the way back to the forbidden gap of the first article.

It is tempting to picture the finished junction as dead — diffusion halted, nothing moving. The truth is subtler and is a favourite of examiners. Two opposing currents flow across the junction at all times, and equilibrium means they cancel, not that they cease. The first is the diffusion current: the majority carriers (electrons from the n-side, holes from the p-side) that are energetic enough to climb the barrier and cross. It is a majority-carrier current, and the taller the barrier, the smaller it gets. The second is the drift current: the junction field sweeps any minority carrier that wanders into the depletion region straight down the hill — a stray electron on the p-side is flung into the n-side, a stray hole on the n-side is flung into the p-side. It is a minority-carrier current, and because minority carriers are scarce it is small and roughly fixed. Equilibrium is the barrier height at which these two exactly balance:

where: $I_{\text{diffusion}}$ is the majority-carrier flow over the barrier and $I_{\text{drift}}$ is the minority-carrier flow down the field. The physical reading is the seed of the entire diode: the barrier self-adjusts to whatever height makes these equal. If you now lower the barrier with an external battery (forward bias), the sensitive diffusion current surges while the drift current barely notices — and the junction conducts. Raise the barrier (reverse bias) and diffusion is choked off, leaving only the tiny drift current — and the junction blocks. That asymmetry is rectification, and it is the whole story of the next article. For now, the essential fact is that with no battery attached the two currents are equal and opposite, so a p–n junction in isolation carries no net current and delivers no power — it is not a battery.

Board level — the built-in field and which way it points (CBSE and ICSE pattern)

A silicon p–n junction in equilibrium has a barrier potential $V_0 = 0.7\ \text{V}$ across a depletion region of total width $W = 1.0\ \mu\text{m} = 1.0\times10^{-6}\ \text{m}$. Estimate the average electric field in the depletion region, state its direction, and say what happens to a stray (minority) electron that drifts to the p-side edge of this region.

Step 1. The average field is the potential drop divided by the distance over which it falls: $E_{\text{avg}} = V_0 / W = 0.7 / (1.0\times10^{-6}) = 7.0\times10^{5}\ \text{V/m}$. The peak field at the metallurgical junction is roughly twice this (the field profile is triangular), of order $10^{6}\ \text{V/m}$ — enormous, over a submicron gap.

Step 2. Direction: the field points from the positive donor ions on the n-side toward the negative acceptor ions on the p-side, i.e. from the n-side to the p-side.

Step 3. A stray electron reaching the p-side edge of the depletion region feels this field. Force on an electron is opposite to the field, so it is pushed from the p-side toward the n-side — the field sweeps it "downhill" back into the n-side. This is exactly the minority-carrier drift current, and it is what balances the majority-carrier diffusion current at equilibrium. Answer: $E_{\text{avg}} \approx 7.0\times10^{5}\ \text{V/m}$, directed n→p, sweeping the stray electron into the n-side.

Competitive level — sharing the depletion width in an asymmetric junction (JEE Main pattern)

A silicon junction has $N_A = 9\times10^{22}\ \text{m}^{-3}$ on the p-side and $N_D = 1\times10^{22}\ \text{m}^{-3}$ on the n-side. The total depletion width is $W = 1.0\ \mu\text{m}$. Find how far the depletion region extends into each side.

Step 1. Charge balance fixes the ratio: $N_A x_p = N_D x_n \Rightarrow x_n/x_p = N_A/N_D = 9\times10^{22} / 1\times10^{22} = 9$. The depletion region reaches nine times farther into the lightly-doped n-side.

Step 2. Impose the total width: $x_p + x_n = W$ with $x_n = 9x_p$ gives $10x_p = 1.0\ \mu\text{m}$, so $x_p = 0.1\ \mu\text{m}$ and $x_n = 0.9\ \mu\text{m}$.

Step 3. Interpret: about $90\%$ of the depletion region lies in the n-side. The heavily-doped p⁺ side is barely depleted at all. In a real device this is deliberate — you dope one side hard to park the junction's field and voltage drop in the other, lighter side. Answer: $x_p = 0.1\ \mu\text{m}$, $x_n = 0.9\ \mu\text{m}$. Timing note: under a minute. The only physics is $N_A x_p = N_D x_n$; everything after is the ratio trick $x_p + n\,x_p = W$. Read off the ratio $n = N_A/N_D$ by inspection, then divide $W$ by $(n+1)$ — no need to write the charges or the area, which cancel.

Enrichment level — how little the barrier moves (beyond the standard board syllabus)

For the silicon junction of derivation 2, $V_0 \approx 0.69\ \text{V}$ with $N_A = N_D = 1\times10^{22}\ \text{m}^{-3}$. (a) By how much does $V_0$ change if the doping on both sides is doubled? (b) Qualitatively, what does raising the temperature do to $V_0$?

Step 1. From $V_0 = (kT/q)\ln(N_A N_D / n_i^2)$, doubling both $N_A$ and $N_D$ multiplies the argument by $4$, so $V_0$ increases by $(kT/q)\ln 4 = 0.0259 \times 1.386 = 0.036\ \text{V}$, that is, about $36\ \text{mV}$ — a rise of only $5\%$ for a fourfold jump in doping.

Step 2. This is the logarithm at work: the barrier is almost indifferent to doping. Practical junctions therefore all cluster near the same $\sim\!0.7\ \text{V}$ (Si) whatever their exact doping — which is why "$0.7\ \text{V}$" is quoted as a universal silicon number.

Step 3. Temperature: $n_i$ rises steeply with $T$ (thermal generation of pairs), so $n_i^2$ grows, the logarithm's argument shrinks, and $V_0$ falls. Real silicon junctions lose roughly $2\ \text{mV}$ of barrier per degree of warming. Answer: (a) $V_0$ rises by about $36\ \text{mV}$; (b) $V_0$ falls as temperature rises. Timing note: seconds, if you spot that only the change matters. A ratio change of the argument turns into an additive change $(kT/q)\ln(\text{ratio})$ of $V_0$ — you never need to recompute the whole logarithm, just $\ln 4$.

Calling the depletion region "empty" or "chargeless." It has no mobile carriers, but it is full of fixed ionised donor and acceptor atoms, and that ionic charge is the entire source of the field and barrier. On CBSE, ICSE, NEET and JEE this distinction is worth the mark.

Treating the built-in $0.7\ \text{V}$ as a usable EMF. You cannot read the barrier on a voltmeter or draw current from it — it is an equilibrium potential that vanishes around any external loop. A junction becomes a source only when light hits it (photovoltaic) or a battery biases it.

Confusing the barrier potential with the band gap. The silicon barrier ($\sim\!0.7\ \text{V}$) and the silicon band gap ($1.1\ \text{eV}$) are different quantities that merely happen to be numerically close-ish. The barrier depends on doping and temperature through equation (2); the gap is a fixed property of the crystal.

Getting diffusion and drift the wrong way round. Diffusion current is majority carriers climbing over the barrier; drift current is minority carriers swept down the field. They flow in opposite senses and cancel at equilibrium. Mislabelling which is which is a classic NEET/JEE slip.

Saying the depletion region is symmetric. Only if the doping is symmetric. In general it is wider on the lightly-doped side, from $N_A x_p = N_D x_n$. Many problems hinge on exactly this.

Board scope. The p–n junction — depletion region, barrier potential, diffusion versus drift — is core on CBSE (Ch. 14), ICSE/ISC, JEE Main, JEE Advanced, NEET, and A-Level 9702. The depletion-width sharing ($N_A x_p = N_D x_n$, pure charge balance) is a defensible JEE-Main-flavoured extension; the quantitative built-in-potential formula (equation 2) is advanced-prep enrichment, above the standard JEE/NEET syllabus — a student is never asked to compute the barrier from this log formula. CBSE, NEET and JEE expect the mechanism and the $0.7/0.3\ \text{V}$ values qualitatively, not a log calculation. Note that AP Physics 2, IB Physics, and IGCSE do not carry semiconductor junction physics at all — do not cite them for this topic.

Texts. NCERT Physics Class 12, Chapter 14 ("Semiconductor Electronics"), the p–n junction section · H. C. Verma, Concepts of Physics Vol. 2, "Semiconductors and Semiconductor Devices" · Sze & Ng, Physics of Semiconductor Devices, for the depletion approximation and built-in potential done properly · Neamen, Semiconductor Physics and Devices, Ch. 7.

Provenance. Anchor values from LANE_SPEC: barrier $\sim\!0.7\ \text{V}$ (Si), $\sim\!0.3\ \text{V}$ (Ge); $n_i(\text{Si})=1.5\times10^{16}\ \text{m}^{-3}$, $n_i(\text{Ge})=2.4\times10^{19}\ \text{m}^{-3}$; thermal voltage $kT/q\approx0.0259\ \text{V}$ at $300\ \text{K}$. Recompute list: charge balance $N_A x_p = N_D x_n$ and ratio $x_n/x_p = N_A/N_D = 9$; $x_p=0.1\ \mu\text{m}$, $x_n=0.9\ \mu\text{m}$ from $10x_p = 1.0\ \mu\text{m}$; built-in potential $V_0 = (kT/q)\ln(N_AN_D/n_i^2)$ giving $\ln = 26.8$ and $V_0=0.69\ \text{V}$ for Si, $\ln=12.1$ and $V_0=0.31\ \text{V}$ for Ge at $N_A=N_D=10^{22}\ \text{m}^{-3}$; doubling doping raises $V_0$ by $(kT/q)\ln4 = 0.036\ \text{V}$; average field $E_{\text{avg}} = V_0/W = 0.7/10^{-6} = 7.0\times10^5\ \text{V/m}$; barrier difference cross-check $V_0(\text{Si})-V_0(\text{Ge}) = (kT/q)\cdot 2\ln(n_{i,\text{Ge}}/n_{i,\text{Si}})$.

Prerequisites. Extrinsic Semiconductors & Doping — where n-type, p-type, donors, acceptors, majority and minority carriers, and the mass-action law $n_e n_h = n_i^2$ are built; this article simply brings those two doped crystals into contact. Leads to. The Junction Diode and its I–V Curve, which biases this equilibrium junction with a battery and reads off the one-way current. For the full treatment of the depletion width and built-in potential — the drift–diffusion equations and the depletion approximation, both requiring calculus — the university seam on semiconductor device physics is the place to go deeper (enrichment only, never needed for the exams above).